Accelerated HPC in the Cloud edge Continuum (AHPC3)
AHPC3 website:
Aims and Scope
Today we are witnessing an increasing demand for high-performance computing infrastructures. Modern applications imply the need to process computationally intensive workloads. Differently from the past, where HPC infrastructures were used by just a handful of application domains, nowadays they are requested by a plethora of domains and applications. This is mainly due to the high availability of a large amount of data. Traditionally, HPC infrastructures were sharply distinct from cloud infrastructures by the unique software and hardware requirements and by their on-premises nature.
However, in recent times such distinction is getting more and more blurry, driven by the proliferation of applications such as those pertaining to Big Data and AI/ML. Modern cloud infrastructures are getting closer to HPC systems in terms of performance capabilities and hardware specifications.
The aim of this workshop is to explore the intersection of high-performance computing and modern cloud edge continuum architectures. The focus will be on how HPC can be achieved by relying on cloud edge architectures. The workshop will investigate how technologies that are typically exploited in the context of cloud and edge environments, including serverless computing, microservices, and load balancers, must be adapted, tailored and managed to achieve efficient and scalable solutions able to support the execution of HPC applications.
Topics of interest include (not limited to) the following:
- Adaptation of cloud-edge technologies and methodologies for HPC (e.g., serverless, microservices, task offloading)
- Cloud-edge computing architectures for HPC (e.g., resource federation )
- Lightweight virtualization tools and execution environments (e.g., WebAssembly, unikernels, and microVM)
- Orchestration, deployment techniques, algorithms, and scheduling for High-performance workflows in Cloud-Edge environments
- Programming paradigms for High Performance Cloud-Edge computing
- Communication and Data management for Cloud-Edge computing
- Fault tolerance, reliability and security in the Cloud-Edge continuum
- Data-intensive workloads and tools
- Methodologies and tools for heterogeneous resource management
- Tools and techniques for monitoring HPC Cloud-Edge applications
- Sustainable and energy-efficient computing for HPC in the cloud-edge continuum
- Accelerated computing architectures for cloud-edge environments (e.g., GPU-based execution, hardware accelerators for AI/ML)
- Data stream processing with FPGA/GPU in cloud-edge computing
- Federated resource-sharing mechanisms for hybrid HPC environments.
- Federated learning in the Cloud/Edge Continuum
- Novel and efficient techniques and algorithms for Cloud/Edge orchestration
- ML/AI based algorithms to support Cloud/Edge computing
Important dates
Abstract submission: October 30, 2025
Full paper submission: November 11, 2025
Author notification: December 16, 2025
Camera ready: January 25, 2026
Submission guidelines
The workshop welcomes research papers and experience papers; nevertheless, papers describing novel research contributions and innovative applications are of particular interest. The workshop welcomes research papers and experience papers. Nevertheless, papers describing novel research contributions and innovative applications are of particular interest. Contributions can be:
- Regular papers (maximum 8 pages) should present innovative works whose claims are supported by solid justifications;
- Short papers (maximum 4 pages) should target position papers.
Authors should submit papers in the IEEE Conference proceedings format (IEEEtran, double-column, 10pt) and follow format guidelines found at https://www.ieee.org/conferences/publishing/templates.html.
For submission, please refer to the Easychair submission system as indicated in the Main Conference webpage, and make sure that you select the “Accelerated HPC in the Cloud edge Continuum (AHPC3)” track.
Each submitted paper will undergo a formal single blind peer review process by at least 3 Program Committee members.
Chairs
Luca Ferrucci – University of Pisa, Italy (contact: luca.ferrucci@unipi.it)
Stefano Forti – University of Pisa, Italy
Valerio Besozzi – University of Pisa, Italy
Jacopo Massa – University of Pisa, Italy
Matteo Della Bartola – University of Pisa, Italy
Program Committee
Jörn Altmann, Seoul National University, Korea
Hojjat Baghban, Chang Gung University, Taiwan
Roberto Casadei, University of Bologna, Italy
Emanuele Carlini, ISTI-CNR, Italy
Massimo Coppola, ISTI-CNR, Italy
Marcin Copik, ETH Zürich, Switzerland
Patrizio Dazzi, University Pisa, Italy
Carlos Guerrero, University of Balearic Islands, Spain
Song Hee Kang, Seoul National University, Korea
Hanna Kavalionak, ISTI-CNR, Italy
Matteo Mordacchini, IIT-CNR, Italy
Paolo Palazzari, ENEA, Italy
Paul Rourab, Siksha ‘O’ Anusandhan University, India
Jocelyn Sérot, Université Clermont Auvergne, France
Konstantinos Tserpes, NTUA, Greece
Paolo Trunfio, University of Calabria, Italy
Karim Djemame, University of Leeds. UK
Theodoros Theodoropoulos, ICCS-NTUA, Greece
Ioannis Kontopoulos, ICCS-NTUA, Greece
Marcelo Pasin, University of Neuchâtel, Switzerland
José Luis Vázquez-Poletti, Universidad Complutense de Madrid, Spain